1. Field of the Invention:
This invention relates to a method for manufacturing a semiconductor device and a semiconductor device manufactured thereby, and more particularly to a method for eliminating a spacer in part on a semiconductor substrate by an etching process, preventing any damage to the semiconductor substrate and gates thereon.
2. Description of the Related Art:
Heretofore, a non-doped polysilicon spacer has been in ordinary use to manufacture a MOS transistor having an LDD structure; such a spacer is formed by forming polysilicon gates on a semiconductor substrate after oxidizing the gates, subsequently, by adding an impurity of a low concentration to the semiconductor substrate and by accumulating polysilicon layer on the after-oxide film.
FIG. 1 shows a semiconductor device manufactured by this conventional method. The semiconductor substrate 4 includes electrode regions 3 of a low impurity concentration. A polysilicon gate 5 is formed on the substrate 4, with a gate oxide film 2 sandwiched between the polysilicon gate 5 and the substrate 4. A non-doped polysilicon spacer 1 is formed over the gate oxide film 2.
The resulting polysilicon spacer 1 is etched by the RIE (reactive ion etching) method and non-doped polysilicon spacers 1 are formed as shown in FIG. 2. Then an impurity of a high concentration is added in the semiconductor substrate. Finally, the polysilicon spacer 1 is further etched by the CDE (chemical dry etching) method to form an LDD structure.
According to the conventional method, however, there has been a disadvantage that the spacer 1 can only be inadequately eliminated in the CDE process due to the composition of the spacer 1. Specifically, since the spacer 1 consists exclusively of a non-doped polysilicon, its etching speed is relatively low. Thus, the difference in etching speed between the polysilicon spacer 1 and the after-oxide film 2 made of SiO.sub.2 would be relatively small to adequately eliminate a desired part of the polysilicon spacer 1.
In other words, if a long time is taken for the etching process to adequately eliminate the polysilicon spacer 1, the etching process would excessively proceed so as to partly etch even the oxide film 2, thus producing a damaged portion 2' as shown in FIG. 3. Further, the etching action could occasionally reach the polysilicon gate 5 to damage, thus producing a damage portion 5'.
To the contrary, if the etching time is shortened to avoid such damage, the spacer 1 would be inadequately eliminated, leaving some unnecessary spacer part as shown in FIG. 4. This residual spacer 1 would act as a floating gate which impairs the transistor property. If the polysilicon gate 5 has a reverse-taper shape, this problem is more intense so that more of the spacer is apt to remain.
Therefore, for the desired elimination of the spacer 1, it has heretofore been a common practice to keep the etching time as long as possible to minimize the margin of the spacer 1 to protect the after-oxide film.
Further, since not only the after-oxide film 2 of the gate but also the field oxide film 8 would be etched during the etching of the polysilicon spacer 1, it is necessary to keep a margin of the field oxide film 8 at the stage of designing. This, like the so-called bird's beak, has been an obstacle to the high integration of the semiconductor device.